An ADPLL for Clock generation in a mixed signal IC

Precise clock generation is required in a majority of mixed signal ICs. Generally a PLL of some sort is used. In a prior post the concept of clock distribution was explored. The actual clock was generated by an interesting PLL based on a DCO. There are some advantages to this technique when it comes to providing a clock to an AMS system. Interested readers may go to www.signalpro.biz and then navigate to "Engineering_Pages>Engineer's corner" and look for the ADPLL design... paper.