Saturday, May 18, 2013
L-Section impedance matching is a popular and simple technique. The basic principle is a single ended input to a single ended output. However, if one has differential inputs and outputs, a way has to be found to convert the single ended matching configuration to a differential configuration. A recent brief paper by Signal Processing Group Inc., addresses this issue. It can be accessed by interested parties at http://www.signalpro.biz >Engineer's corner.
Saturday, May 4, 2013
This brief note is an addendum to an earlier post on a low voltage modified Gilbert cell mixer. If the power supplies ( VCC ) do not vary too much ( typically 5%), then the low voltage mixer can be used as is. However, if the power supply variation is greater ( say 3.0 to 6.0V ), then the earlier design's current dissipation will be uncontrollable. In such a case it is best to revert to the standard Gilbert cell mixer. The saving grace is, that if the design is being done in a Bi-CMOS process, then instead of using a bipolar as the tail current in the mixer, a MOSFET can be used. Note that in this case the drain to source voltage of the MOSFET can be very low ( VDS=0.1V or lower) depending on size. In this case the power supply voltage will have a minimal effect on the performance.
Thursday, May 2, 2013
RF mixers are workhorses of many RF/wireless designs. There are a number of types in use. Many are passive ( diodes, CMOS quads, etc) and some are active ( single balanced, doubly balanced). A ubiquitous design is the Gilbert cell mixer. It is doubly balanced, provides gain, can be implemented simply in ICs. However, when it comes to low voltage operation it causes issues. Therefore a number of modified Gilbert cell mixers have been proposed. Among them is the mixer described in a recently released brief by Signal Processing Group Inc. Please access it at http://www.signalpro.biz>engineer's corner. For further details and discussion please contact the author at email@example.com.
Monday, April 22, 2013
For high frequency bipolar design there are two parameters which are important in estimating the device performance. ( In actual fact the fmax of the bipolar device is equally important but is not detailed here). tF, the total forward transit time, is used for modeling the excess charge stored in the transistor when its emitter - base junction is forward biased and its collector to base voltage is VBC = 0.0. It is also needed to calculate the transistor's emitter diffusion capacitance. Typically the tF varies with IC ( the collector current). Values of tF generally range from 0.3 nanosecond to a few or fractions of a picosecond for high frequency devices. fT is the transistors's unity gain bandwidth. fT is defined as the frequency at which the common emitter, zero-load, small signal current gain extrapolates to unity. The roll-off is 6dB/octave. This information should be used to determine the performance required for particular device suitable for design at a particular frequency point. tF and fT are parameters used in models that drive CAD programs. In some programs the user can enter fT or tF directly while in others either fT or tF is converted from either parameter. fT can be measured using a small signal method. In this method the ratio Iout/Iin ( the current gain in a common emitter configuration)is measured for a range of frequencies from DC to the 3 dB point and beyond at a desired bias point. Then fT = product of current gain at DC and the 3dB frequency, i.e B0 X fb. Here B0 is the dc current gain and fb is the 3 dB frequency. Alternatively, another B and frequency value can be measured to determine fT. For example, at any frequency, fm, between 3fb and ft/3, the B value at that frequency Bm, is measured. Then fT = Bm X fm. It is recommended that multiple measurements be made to verify that fm lies in the 6 dB/octave roll-off region. Once fT is known tF can be obtained from it using the formulas described elsewhere in this blog.
Gummel plots are a very useful utility that a bipolar fabrication facility provides or can provide. This is a great utility/tool for the bipolar IC designer. In addition to actual device models and layout rules Gummel plots serve to provide, at a glance the DC performance of a bipolar. The plot itself is a semi-logarithmic plot of the collector current and the base current versus the Vbe of the device. From these plots a number of parameters can be estimated very quickly and can be of inestimable value to the designer. Obviously DC forward gain ( Ic/Ib), is clearly shown, the Vbe of the device at current is available, the common base current gain is available in a straightforward manner and the DC gm can be estimated among other parameters.
Friday, April 5, 2013
Two useful definitions for RF amplifiers are available gain and maximum available gain. Available gain is measured with conjugate match at both input and output ports. Then Available gain = Available power at the output port/Available power from the source. This is the maximum gain obtainable from the amplifier. The maximum available gain ( MAG) is often used as a transistor or FET figure of merit. It is defined as the theoretical power gain of the device with its reverse transfer admittance set to zero. The source and load admittances are conjugately matched. The MAG = Absolute value(yf)**2/4gigo where gi and go are the real parts of the input and output admittances. yf is the forward transfer admittance.
Thursday, April 4, 2013
A common circuit used in most wireless receivers is the RSSI circuit or block. It simply measures or provides an indication of the signal strength being received. It is usually implemented within the receiver chip. The circuitry used for the RSSI appears to be simple but there are a number of issues that must be borne in mind. To begin with, a RSSI circuit can be implemented using the concept of log amplifiers. A really good source of information on these is the Analog Devices website. It may take a bit of searching to find the right article but it is worth it.Also a tutorial article has been already published in these blog posts which may be of some use. However, through experience it has been found ( at SPG) that even if we follow prior art on RSSI design it still takes some doing. Here are a few tips if one is thinking of doing a rssi circuit. ( Of course higher frequencies complicate things even more). (1) Must understand the techniques intuitively. (2) Select a process that can meet the ft/IKF/Hfe/CBC requirements easily. (3)Simulations will take a long time so must be prepared for long simulation times. (4) Bond pad and package parasitics will play a significant role in the performance. So the more accurate these are the better. If package parasitic information is not available then it must be generated ( which is a project in its own right). For more information please access the RSSI design paper in the SPG website located at http://www.signalpro.biz, under engineering pages or contact SPG directly using the contact details provided.