Analog ASICs: Low cost, low risk, quick turn?

In the world of analog asic design, development and manufacture there are certain trade-offs that are conventional. You can have a low risk design, if you spend a little extra time on the design, you can do a quick turn asic if you are willing to assume a little higher risk and so on. Signal Processing Group Inc, has a technique called the FastChip which allows one to approach the three parameters of design relatively closely for smaller analog chips. The description of the technique is provided in the engineering pages on the SPG website located at http://www.signalpro.biz. Both low and high frequency designs can be accommodated. Interested parties can contact SPG for a list of the types of silicon proven designs available for immediate implementation ( or one can specify what one needs). To provide a frame of reference for performance parameters the following is provided as an estimator: Supply voltage ranges [1.2V to 550V), currents[<10A], frequencies[ DC to < 100 Ghz operating]. To get information on the types of quick turn silicon proven designs available as well as hard numbers on investment, timelines, etc please contact SPG through the website.

Lateral pnp current gain calculation

When a standard bipolar process is used in which there are vertical NPN transistors and lateral pnp transistors it is sometimes difficult to assess the lateral PNP parameters. This post addresses a way to estimate the current gain (BETA)of a lateral PNP from its geometry. The paper which describes this technique is located in the Signal Processing Group Inc., website at http://www.signalpro.biz. Interested readers are invited to peruse this article at their convenience.

Noise cancellation: The lock in amplifier

Noise cancellation in systems with low amplitude input signals embedded in large noise levels is always a problem. Few techniques are available to extract these low level signals from noise but tend to be expensive in many ways. Lock-in amplifiers can be used to measure very small AC signals(a few nanovolts).

The basic technique used by lock in amplifiers is known as phase-sensitive detection to single out the component of the signal at a particular reference frequency and phase. i.e. it is a very narrow band filter equivalent and noise signals are attenuated. For example. The signal is a 10 nV sine wave at 10 kHz. Amplification is used to bring the signal above the noise. A good low-noise amplifier will have about 5 nV/√Hz of input noise. If the amplifier bandwidth is 100 kHz and the gain is 1000, the output will be 10 µV of signal (10 nV × 1000) and the noise will be 1.6mv. This means it will be very difficult if not impossible to measure the signal of interest.

If the amplifier is followed by a narrow band filter, with a Q=100 centered at 10 kHz, any signal in a 100 Hz bandwidth will be detected (10kHz/Q). The noise in the filter pass band will be 50 µV (5 nV/√Hz ×√100 Hz × 1000), and the signal will still be 10 µV. However, the output noise is still much larger than the signal, and a measurement can not be made.

If the amplifier is followed by a phase-sensitive detector, then the PSD can detect with an extremely narrow bandwidth of 0.01 Hz! In this case the noise in the detection bandwidth drops to 0.5 µV (5 nV/√Hz ×√.01 Hz × 1000), but the signal stays at 10 µV. The S/N is now 20, and the signal can be measured.

Creative circuit design can be used to measure small signals in other parts of the signal spectrum also. The interested reader is referred to Signal Processing Group Inc ( website http://www.signalpro.biz) for more information. Please contact the SPG techteam through the "contact" menu item if needed.

Interestingly enough a monolithic version of the lock in amplifier is available with a 100dB range at a reasonable cost.

Analog and mixed signal chip/asic markets: A 2012 snapshot

This is not about engineering. Its about an equally interesting and relevant subject. A team from SPG took a look at what the various marketing and sales gurus are saying about the analog chip, and analog asic and mixed signal,market. A number of summaries(with credit to the references) has been included in the engineer's corner in the SPG website at http://www.signalpro.biz. Interested readers are welcome to read it. Any comments would be very welcome, especially as marketing and sales numbers can be somewhat confusing and "flexible". Some backbone could be inserted by readers who are in the forefront of the fray. Any comments will of course be available right here in the blog. Thanks in advance to those who send in their own comments and numbers so all of us can benefit. For more detail please access the detailed market reports ( at a serious cost by the way from the research companies)from the websites of the various references quoted right up front.