Saturday, January 28, 2012
Path loss in free space and received voltage at an antenna
Radio signals suffer a path loss in free space ( as well as in other media). Recently a brief article was released by SPG technical staff which provides some simple expressions for the calculation of this free space path loss These expressions are useful in quick calculations of received power at a close in distance for an antenna. Using these expressions, and the formula for calculating the induced voltage in an antenna as a result of the received power, is a starting point for more sophisticated calculations. This paper can be found at http://www.signalpro.biz >> engineer's corner.
Monday, January 16, 2012
Super-Beta or high current gain npn transistors
In certain analog ICs it is necessary to have very high input impedance and very low base currents. For such applications, the typical current gains of an integrated npn transistor are not high enough. It is possible to increase the current gain of an npn transistor significantly by improving the base transport efficiency. In this case the base is very narrow ( a few hundred angstroms or less). The collector to emitter breakdown of a structure like this is relatively low ( 2V - 3V) because the collector base depletion layer can punch through the active base region into the emitter. This is the punch-through or "super-beta" transistor. Current gains of 5000 are obtainable using this technique at currents of 20uA or so with a Vce of around 0.5V. The fabrication of super-beta transistors in a standard process can be done by using one extra masking step and diffusion. After the base diffusion for the normal NPN transistors a special mask is used to open up the emitter diffusion for the super-beta transistors. At this stage the emitter of the super-beta transistor is only partially diffused.This step is then followed by the masking and n+ diffusion of the standard npn. Owing to the extra diffusion step for the super-beta transistor, the emitter of the super-beta transistor is diffused slightly deeper
than the normal npn resulting in a narrow base width.
than the normal npn resulting in a narrow base width.
Sunday, January 15, 2012
1.2V battery to 3.3V and 5.0V output power pcb design
Recent needs in low power and single battery ( 1.2V) design demand a power converter circuit. A recent requirement for a handheld FM receiver ( multichannel) necessitated
the design of a voltage supply converter using off the shelf devices. After a thorough search for off the shelf devices which could be used to realize such a converter a device was chosen from a popular manufacturer and the design was started. Here are some issues that we encountered, ( perhaps not new, but nonetheless need to be mentioned). Our biggest challenges, suprizingly enough had very little to do with the IC that we used. This was because the vendor had excellent technical support and application notes and had a well organized technical support environment. Our requests were handled within a 24 to 48 hour turnaround. The challenges that were difficult had to do with selecting, acquiring and using the passive components. These were harder to find and technical support left much to be desired. In spite of these issues we managed to finish the design in time and test the board. It worked quite well and provided 3.3V at close to 1.0A and 5.0V at close to 0.5A as needed with a 20% margin. Interested readers are invited to contact us through our website at http://www.signalpro.biz.
the design of a voltage supply converter using off the shelf devices. After a thorough search for off the shelf devices which could be used to realize such a converter a device was chosen from a popular manufacturer and the design was started. Here are some issues that we encountered, ( perhaps not new, but nonetheless need to be mentioned). Our biggest challenges, suprizingly enough had very little to do with the IC that we used. This was because the vendor had excellent technical support and application notes and had a well organized technical support environment. Our requests were handled within a 24 to 48 hour turnaround. The challenges that were difficult had to do with selecting, acquiring and using the passive components. These were harder to find and technical support left much to be desired. In spite of these issues we managed to finish the design in time and test the board. It worked quite well and provided 3.3V at close to 1.0A and 5.0V at close to 0.5A as needed with a 20% margin. Interested readers are invited to contact us through our website at http://www.signalpro.biz.
Tuesday, January 3, 2012
Wireless monitoring for animal health.
A visit to Germany and Switzerland was fruitful with some interesting ways the Europeans are using wireless technology. As elsewhere, wireless is being used in almost every restaurant to bill smart cards and credit cards tableside. An interesting application of wireless was encountered in the dairy farming industry where the use of wireless enabled bolus' monitor health and various other states of cows and other farm animals. This is different from RFID that is used in identification. An interesting aside to this is the fact that there is very little data available on the propagation loss of a radio signal through living tissue ( in bovines and other species). Frequencies are not really standardized. There is a European standard but it appears that vendors are still using their own specifications. Happy new year to all!
Thursday, December 8, 2011
Equalizer design experiences
About two and half years ago we started a program for the design and development of wireline equalizers, both fixed and adaptive. Our first designs will be going into fabrication this month. This post is an attempt to document some issues and challenges we faced on this project.
1) Data and models of cables: Immediately it was obvious that there is a big hole in the data for cables. Our designs were for 5 Ghz and 1.65 Ghz. We found almost no data on the characteristics of cables for these frequencies. After a little research it turned out that we would have to do our own modeling using a TDR and Simulink/MATLAB and a few home grown tools. This is not an inexpensive activity. The boards required as interfaces to the machine cost about $10k a piece! The TDR is also a very expensive machine. We tried searching the web but found little available data. Manufacturers of the cables do publish data but it turned out that it was the wrong kind of data for our purposes. So cable characteristics are difficult to get.
2) Design tools: The second challenge was, the design tools available for design of ICs are, in our opinion not terribly useful when designing equalizers. Long sequences of really high frequency data are needed to check performance. These types of simulations can really run extremely slow and simulating a complete chip was almost impossible. A combination of SIMULINK and SPICE type simulators ( including Agilent ADS) were used but in our opinion left quite a bit to be desired. Equalizer designers beware!
3) IC process data: The fabrication houses that we selected ( “world class”) provided very good data on their processes. Again this data was good for about 80% of the design but 20% of the design could not be covered by the given data.
4) ESD protection: This is a problem for high frequency equalizer design in particular and in general a good ESD structure is difficult to do. The issue is this: If we use the characterized ESD cells then we have a challenge because of the parasitics. If we make our own ESD cells then we have no characterization data. So I suppose this makes ESD a major challenge in these types of devices. Remembering that the input lines actually come in from outside. ( Existing TVS devices are woefully inadequate for ESD.)
5) Test: The challenge of testing the equalizers looms large of course. A combination of standard lab equipment ( expensive) and custom made equipment is perhaps the best approach. Again the making of the test equipment is a challenge in itself as we found.
6) Demo boards: A real challenge. We had to go through a number of iterations with both PCB vendors and designs. The first PCB we did gave a clear impedance step at 150 Mhz and really caused errors in the measurements. Subsequent designs were great improvements but we still need more improvement and are working on it.
So the design and development of these wireline equalizers is, in our opinion not a “walk in the park” Good luck to all the equalizer designers and many congratulations to the successful ones. You guys have really licked the problems!
1) Data and models of cables: Immediately it was obvious that there is a big hole in the data for cables. Our designs were for 5 Ghz and 1.65 Ghz. We found almost no data on the characteristics of cables for these frequencies. After a little research it turned out that we would have to do our own modeling using a TDR and Simulink/MATLAB and a few home grown tools. This is not an inexpensive activity. The boards required as interfaces to the machine cost about $10k a piece! The TDR is also a very expensive machine. We tried searching the web but found little available data. Manufacturers of the cables do publish data but it turned out that it was the wrong kind of data for our purposes. So cable characteristics are difficult to get.
2) Design tools: The second challenge was, the design tools available for design of ICs are, in our opinion not terribly useful when designing equalizers. Long sequences of really high frequency data are needed to check performance. These types of simulations can really run extremely slow and simulating a complete chip was almost impossible. A combination of SIMULINK and SPICE type simulators ( including Agilent ADS) were used but in our opinion left quite a bit to be desired. Equalizer designers beware!
3) IC process data: The fabrication houses that we selected ( “world class”) provided very good data on their processes. Again this data was good for about 80% of the design but 20% of the design could not be covered by the given data.
4) ESD protection: This is a problem for high frequency equalizer design in particular and in general a good ESD structure is difficult to do. The issue is this: If we use the characterized ESD cells then we have a challenge because of the parasitics. If we make our own ESD cells then we have no characterization data. So I suppose this makes ESD a major challenge in these types of devices. Remembering that the input lines actually come in from outside. ( Existing TVS devices are woefully inadequate for ESD.)
5) Test: The challenge of testing the equalizers looms large of course. A combination of standard lab equipment ( expensive) and custom made equipment is perhaps the best approach. Again the making of the test equipment is a challenge in itself as we found.
6) Demo boards: A real challenge. We had to go through a number of iterations with both PCB vendors and designs. The first PCB we did gave a clear impedance step at 150 Mhz and really caused errors in the measurements. Subsequent designs were great improvements but we still need more improvement and are working on it.
So the design and development of these wireline equalizers is, in our opinion not a “walk in the park” Good luck to all the equalizer designers and many congratulations to the successful ones. You guys have really licked the problems!
Wednesday, November 23, 2011
Thermal coeffcients for the dielectric constant of FR-4 and PCB materials.
In a recent group discussion on Linkedin, a member asked about the thermal coefficients of FR-4 and other common pcb materials. For interested persons a really good paper by John Coonrod, in the September issue of www.onboard-technology.com tabulates these coefficients.
Saturday, November 19, 2011
Ferrite beads: A useful circuit component
Ferrite beads are a very low cost and easy way to add high frequency isolation loss in a circuit without a power loss at DC and low frequencies. Ferrite beads are most effective at frequencies in excess of 1.0 Mhz. When these are used with the appropriate parallel capacitance, they provide high frequency decoupling and parasitic suppression. A brief paper on ferrite beads has been released by Signal Processing Group Inc and may be found at http://www.signalpro.biz>>engineer’s corner.
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